1 files changed, 385 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h b/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h
new file mode 100644
index 000000000..f3e0970d7
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h
@@ -0,0 +1,385 @@
+/*
+    ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+/**
+ * @file    MSP430X/hal_pal_lld.h
+ * @brief   MSP430X PAL subsystem low level driver header.
+ *
+ * @addtogroup PAL
+ * @{
+ */
+#ifndef HAL_PAL_LLD_H
+#define HAL_PAL_LLD_H
+#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__)
+/*===========================================================================*/
+/* Unsupported modes and specific modes                                      */
+/*===========================================================================*/
+#undef PAL_MODE_INPUT_ANALOG /* configure this through the ALTERNATE macros */
+#undef PAL_MODE_OUTPUT_OPENDRAIN
+/**
+ * @name    MSP430X-specific I/O mode flags
+ * @{
+ */
+/**
+ * @brief   Alternate mode 1
+ */
+#define PAL_MSP430X_ALTERNATE_1 8
+/**
+ * @brief   Alternate mode 2
+ */
+#define PAL_MSP430X_ALTERNATE_2 9
+/**
+ * @brief   Alternate mode 3
+ */
+#define PAL_MSP430X_ALTERNATE_3 10
+#define ALTERNATE_HELP(n) (PAL_MSP430X_ALTERNATE_##n)
+/**
+ * @brief   Alternate function.
+ *
+ * @param[in] n   alternate function selector - 1 through 3
+ */
+#define PAL_MODE_ALTERNATE(n) (ALTERNATE_HELP(n))
+/** @} */
+/*===========================================================================*/
+/* I/O Ports Types and constants.                                            */
+/*===========================================================================*/
+/**
+ * @name    Port related definitions
+ * @{
+ */
+/**
+ * @brief   Width, in bits, of an I/O port.
+ */
+#define PAL_IOPORTS_WIDTH 16U
+/**
+ * @brief   Whole port mask.
+ * @details This macro specifies all the valid bits into a port.
+ */
+#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFU)
+/** @} */
+/**
+ * @name    Line handling macros
+ * @{
+ */
+/**
+ * @brief   Forms a line identifier.
+ * @details A port/pad pair are encoded into an @p ioline_t type. The encoding
+ *          of this type is platform-dependent.
+ * @note    In this driver the pad number is encoded in the upper 4 bits of
+ *          the GPIO address which are guaranteed to be zero.
+ */
+#define PAL_LINE(port, pad)                                                    \
+  ((ioline_t)((uint16_t)(port)) | (((uint16_t)(pad)) << 12))
+/**
+ * @brief   Decodes a port identifier from a line identifier.
+ */
+#define PAL_PORT(line)                                                         \
+  ((msp430x_gpio_registers_t *)(((uint16_t)(line)) & 0x0FFFU))
+/**
+ * @brief   Decodes a pad identifier from a line identifier.
+ */
+#define PAL_PAD(line) ((uint16_t)((uint16_t)(line) >> 12))
+/**
+ * @brief   Value identifying an invalid line.
+ */
+#define PAL_NOLINE 0U
+/** @} */
+/**
+ * @brief   MSP430X register initialization
+ */
+typedef struct {
+  /** Initial value for OUT register.*/
+  uint16_t out;
+  /** Initial value for DIR register.*/
+  uint16_t dir;
+  /** Initial value for REN register.*/
+  uint16_t ren;
+  /** Initial value for SEL0 register.*/
+  uint16_t sel0;
+  /** Initial value for SEL1 register.*/
+  uint16_t sel1;
+  /** Initial value for IES register.*/
+  uint16_t ies;
+  /** Initial value for IE register.*/
+  uint16_t ie;
+} msp430x_gpio_setup_t;
+/**
+ * @brief   MSP430X registers block
+ * @note    Some ports do not support all of these fields.
+ */
+typedef struct {
+  volatile uint16_t in;
+  volatile uint16_t out;
+  volatile uint16_t dir;
+  volatile uint16_t _padding;
+  volatile uint16_t ren;
+  volatile uint16_t sel0;
+  volatile uint16_t sel1;
+  volatile uint16_t _padding1;
+  volatile uint16_t _padding2;
+  volatile uint16_t _padding3;
+  volatile uint16_t _padding4;
+  volatile uint16_t selc;
+  volatile uint16_t ies;
+  volatile uint16_t ie;
+  volatile uint16_t ifg;
+} msp430x_gpio_registers_t;
+/**
+ * @brief   MSP430X I/O ports static initializer.
+ * @details An instance of this structure must be passed to @p palInit() at
+ *          system startup time in order to initialized the digital I/O
+ *          subsystem. This represents only the initial setup, specific pads
+ *          or whole ports can be reprogrammed at later time.
+ */
+typedef struct {
+#if defined(PA_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t porta;
+#endif
+#if defined(PB_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t portb;
+#endif
+#if defined(PC_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t portc;
+#endif
+#if defined(PD_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t portd;
+#endif
+#if defined(PE_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t porte;
+#endif
+#if defined(PF_BASE) || defined(__DOXYGEN__)
+  msp430x_gpio_setup_t portf;
+#endif
+  msp430x_gpio_setup_t portj;
+} PALConfig;
+/**
+ * @brief   Digital I/O port sized unsigned type.
+ */
+typedef uint16_t ioportmask_t;
+/**
+ * @brief   Digital I/O modes.
+ */
+typedef uint16_t iomode_t;
+/**
+ * @brief   Type of an I/O line.
+ */
+typedef uint16_t ioline_t;
+/**
+ * @brief   Port Identifier.
+ * @details This type can be a scalar or some kind of pointer, do not make
+ *          any assumption about it, use the provided macros when populating
+ *          variables of this type.
+ */
+typedef msp430x_gpio_registers_t * ioportid_t;
+/*===========================================================================*/
+/* I/O Ports Identifiers.                                                    */
+/*===========================================================================*/
+/**
+ * @brief   GPIO port A identifier.
+ */
+#if defined(PA_BASE) || defined(__DOXYGEN__)
+#define IOPORT1 ((volatile msp430x_gpio_registers_t *)PA_BASE)
+#endif
+/**
+ * @brief   GPIO port B identifier.
+ */
+#if defined(PB_BASE) || defined(__DOXYGEN__)
+#define IOPORT2 ((volatile msp430x_gpio_registers_t *)PB_BASE)
+#endif
+/**
+ * @brief   GPIO port C identifier.
+ */
+#if defined(PC_BASE) || defined(__DOXYGEN__)
+#define IOPORT3 ((volatile msp430x_gpio_registers_t *)PC_BASE)
+#endif
+/**
+ * @brief   GPIO port D identifier.
+ */
+#if defined(PD_BASE) || defined(__DOXYGEN__)
+#define IOPORT4 ((volatile msp430x_gpio_registers_t *)PD_BASE)
+#endif
+/**
+ * @brief   GPIO port E identifier.
+ */
+#if defined(PE_BASE) || defined(__DOXYGEN__)
+#define IOPORT5 ((volatile msp430x_gpio_registers_t *)PE_BASE)
+#endif
+/**
+ * @brief   GPIO port F identifier.
+ */
+#if defined(PF_BASE) || defined(__DOXYGEN__)
+#define IOPORT6   ((volatile msp430x_gpio_registers_t *)PF_BASE
+#endif
+/**
+ * @brief   GPIO port J identifier.
+ */
+#define IOPORT0 ((volatile msp430x_gpio_registers_t *)PJ_BASE)
+/*===========================================================================*/
+/* Implementation, some of the following macros could be implemented as      */
+/* functions, if so please put them in pal_lld.c.                            */
+/*===========================================================================*/
+/**
+ * @brief   Low level PAL subsystem initialization.
+ *
+ * @param[in] config    architecture-dependent ports configuration
+ *
+ * @notapi
+ */
+#define pal_lld_init(config) _pal_lld_init(config)
+/**
+ * @brief   Reads the physical I/O port states.
+ *
+ * @param[in] port      port identifier
+ * @return              The port bits.
+ *
+ * @notapi
+ */
+#define pal_lld_readport(port) ((port)->in)
+/**
+ * @brief   Reads the output latch.
+ * @details The purpose of this function is to read back the latched output
+ *          value.
+ *
+ * @param[in] port      port identifier
+ * @return              The latched logical states.
+ *
+ * @notapi
+ */
+#define pal_lld_readlatch(port) ((port)->out)
+/**
+ * @brief   Writes a bits mask on a I/O port.
+ *
+ * @param[in] port      port identifier
+ * @param[in] bits      bits to be written on the specified port
+ *
+ * @notapi
+ */
+#define pal_lld_writeport(port, bits) ((port)->out = (bits))
+/**
+ * @brief   Sets a bits mask on a I/O port.
+ *
+ * @param[in] port      port identifier
+ * @param[in] bits      bits to be ORed on the specified port
+ *
+ * @notapi
+ */
+#define pal_lld_setport(port, bits) ((port)->out |= (bits))
+/**
+ * @brief   Clears a bits mask on a I/O port.
+ *
+ * @param[in] port      port identifier
+ * @param[in] bits      bits to be cleared on the specified port
+ *
+ * @notapi
+ */
+#define pal_lld_clearport(port, bits) ((port)->out &= ~(bits))
+/**
+ * @brief   Toggles a bits mask on a I/O port.
+ *
+ * @param[in] port      port identifier
+ * @param[in] bits      bits to be XORed on the specified port
+ *
+ * @notapi
+ */
+#define pal_lld_toggleport(port, bits) ((port)->out ^= (bits))
+/**
+ * @brief   Pads group mode setup.
+ * @details This function programs a pads group belonging to the same port
+ *          with the specified mode.
+ * @note    Programming an unknown or unsupported mode is silently ignored.
+ *
+ * @param[in] port      port identifier
+ * @param[in] mask      group mask
+ * @param[in] offset    group bit offset within the port
+ * @param[in] mode      group mode
+ *
+ * @notapi
+ */
+#define pal_lld_setgroupmode(port, mask, offset, mode)                         \
+  _pal_lld_setgroupmode(port, mask << offset, mode)
+/**
+ * @brief   Clears a pad logical state to @p PAL_LOW.
+ * @details This function is implemented in a way which should
+ *          produce a BIC instruction rather than an AND
+ *
+ * @param[in] port      port identifier
+ * @param[in] pad       pad number within the port
+ *
+ * @notapi
+ */
+#define pal_lld_clearpad(port, pad) ((port)->out &= ~(1 << pad))
+#if !defined(__DOXYGEN__)
+extern const PALConfig pal_default_config;
+#endif
+#ifdef __cplusplus
+extern "C" {
+#endif
+void _pal_lld_init(const PALConfig * config);
+void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode);
+#ifdef __cplusplus
+}
+#endif
+#endif /* HAL_USE_PAL == TRUE */
+#endif /* _PAL_LLD_H_ */
+/** @} */

diff --git a/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h b/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h new file mode 100644 index 000000000..f3e0970d7 --- /dev/null +++ b/lib/chibios-contrib/os/hal/ports/MSP430X/hal_pal_lld.h
@@ -0,0 +1,385 @@
	1	/*
	2	ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
	3
	4	Licensed under the Apache License, Version 2.0 (the "License");
	5	you may not use this file except in compliance with the License.
	6	You may obtain a copy of the License at
	7
	8	http://www.apache.org/licenses/LICENSE-2.0
	9
	10	Unless required by applicable law or agreed to in writing, software
	11	distributed under the License is distributed on an "AS IS" BASIS,
	12	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	13	See the License for the specific language governing permissions and
	14	limitations under the License.
	15	*/
	16
	17	/**
	18	* @file MSP430X/hal_pal_lld.h
	19	* @brief MSP430X PAL subsystem low level driver header.
	20	*
	21	* @addtogroup PAL
	22	* @{
	23	*/
	24
	25	#ifndef HAL_PAL_LLD_H
	26	#define HAL_PAL_LLD_H
	27
	28	#if (HAL_USE_PAL == TRUE) \|\| defined(__DOXYGEN__)
	29
	30	/===========================================================================/
	31	/* Unsupported modes and specific modes */
	32	/===========================================================================/
	33
	34	#undef PAL_MODE_INPUT_ANALOG /* configure this through the ALTERNATE macros */
	35	#undef PAL_MODE_OUTPUT_OPENDRAIN
	36
	37	/**
	38	* @name MSP430X-specific I/O mode flags
	39	* @{
	40	*/
	41
	42	/**
	43	* @brief Alternate mode 1
	44	*/
	45	#define PAL_MSP430X_ALTERNATE_1 8
	46
	47	/**
	48	* @brief Alternate mode 2
	49	*/
	50	#define PAL_MSP430X_ALTERNATE_2 9
	51
	52	/**
	53	* @brief Alternate mode 3
	54	*/
	55	#define PAL_MSP430X_ALTERNATE_3 10
	56
	57	#define ALTERNATE_HELP(n) (PAL_MSP430X_ALTERNATE_##n)
	58	/**
	59	* @brief Alternate function.
	60	*
	61	* @param[in] n alternate function selector - 1 through 3
	62	*/
	63	#define PAL_MODE_ALTERNATE(n) (ALTERNATE_HELP(n))
	64
	65	/** @} */
	66
	67	/===========================================================================/
	68	/* I/O Ports Types and constants. */
	69	/===========================================================================/
	70
	71	/**
	72	* @name Port related definitions
	73	* @{
	74	*/
	75	/**
	76	* @brief Width, in bits, of an I/O port.
	77	*/
	78	#define PAL_IOPORTS_WIDTH 16U
	79
	80	/**
	81	* @brief Whole port mask.
	82	* @details This macro specifies all the valid bits into a port.
	83	*/
	84	#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFU)
	85
	86	/** @} */
	87
	88	/**
	89	* @name Line handling macros
	90	* @{
	91	*/
	92	/**
	93	* @brief Forms a line identifier.
	94	* @details A port/pad pair are encoded into an @p ioline_t type. The encoding
	95	* of this type is platform-dependent.
	96	* @note In this driver the pad number is encoded in the upper 4 bits of
	97	* the GPIO address which are guaranteed to be zero.
	98	*/
	99	#define PAL_LINE(port, pad) \
	100	((ioline_t)((uint16_t)(port)) \| (((uint16_t)(pad)) << 12))
	101
	102	/**
	103	* @brief Decodes a port identifier from a line identifier.
	104	*/
	105	#define PAL_PORT(line) \
	106	((msp430x_gpio_registers_t *)(((uint16_t)(line)) & 0x0FFFU))
	107
	108	/**
	109	* @brief Decodes a pad identifier from a line identifier.
	110	*/
	111	#define PAL_PAD(line) ((uint16_t)((uint16_t)(line) >> 12))
	112
	113	/**
	114	* @brief Value identifying an invalid line.
	115	*/
	116	#define PAL_NOLINE 0U
	117	/** @} */
	118
	119	/**
	120	* @brief MSP430X register initialization
	121	*/
	122	typedef struct {
	123	/** Initial value for OUT register.*/
	124	uint16_t out;
	125	/** Initial value for DIR register.*/
	126	uint16_t dir;
	127	/** Initial value for REN register.*/
	128	uint16_t ren;
	129	/** Initial value for SEL0 register.*/
	130	uint16_t sel0;
	131	/** Initial value for SEL1 register.*/
	132	uint16_t sel1;
	133	/** Initial value for IES register.*/
	134	uint16_t ies;
	135	/** Initial value for IE register.*/
	136	uint16_t ie;
	137	} msp430x_gpio_setup_t;
	138
	139	/**
	140	* @brief MSP430X registers block
	141	* @note Some ports do not support all of these fields.
	142	*/
	143	typedef struct {
	144	volatile uint16_t in;
	145	volatile uint16_t out;
	146	volatile uint16_t dir;
	147	volatile uint16_t _padding;
	148	volatile uint16_t ren;
	149	volatile uint16_t sel0;
	150	volatile uint16_t sel1;
	151	volatile uint16_t _padding1;
	152	volatile uint16_t _padding2;
	153	volatile uint16_t _padding3;
	154	volatile uint16_t _padding4;
	155	volatile uint16_t selc;
	156	volatile uint16_t ies;
	157	volatile uint16_t ie;
	158	volatile uint16_t ifg;
	159	} msp430x_gpio_registers_t;
	160
	161	/**
	162	* @brief MSP430X I/O ports static initializer.
	163	* @details An instance of this structure must be passed to @p palInit() at
	164	* system startup time in order to initialized the digital I/O
	165	* subsystem. This represents only the initial setup, specific pads
	166	* or whole ports can be reprogrammed at later time.
	167	*/
	168	typedef struct {
	169	#if defined(PA_BASE) \|\| defined(__DOXYGEN__)
	170	msp430x_gpio_setup_t porta;
	171	#endif
	172	#if defined(PB_BASE) \|\| defined(__DOXYGEN__)
	173	msp430x_gpio_setup_t portb;
	174	#endif
	175	#if defined(PC_BASE) \|\| defined(__DOXYGEN__)
	176	msp430x_gpio_setup_t portc;
	177	#endif
	178	#if defined(PD_BASE) \|\| defined(__DOXYGEN__)
	179	msp430x_gpio_setup_t portd;
	180	#endif
	181	#if defined(PE_BASE) \|\| defined(__DOXYGEN__)
	182	msp430x_gpio_setup_t porte;
	183	#endif
	184	#if defined(PF_BASE) \|\| defined(__DOXYGEN__)
	185	msp430x_gpio_setup_t portf;
	186	#endif
	187	msp430x_gpio_setup_t portj;
	188	} PALConfig;
	189
	190	/**
	191	* @brief Digital I/O port sized unsigned type.
	192	*/
	193	typedef uint16_t ioportmask_t;
	194
	195	/**
	196	* @brief Digital I/O modes.
	197	*/
	198	typedef uint16_t iomode_t;
	199
	200	/**
	201	* @brief Type of an I/O line.
	202	*/
	203	typedef uint16_t ioline_t;
	204
	205	/**
	206	* @brief Port Identifier.
	207	* @details This type can be a scalar or some kind of pointer, do not make
	208	* any assumption about it, use the provided macros when populating
	209	* variables of this type.
	210	*/
	211	typedef msp430x_gpio_registers_t * ioportid_t;
	212
	213	/===========================================================================/
	214	/* I/O Ports Identifiers. */
	215	/===========================================================================/
	216
	217	/**
	218	* @brief GPIO port A identifier.
	219	*/
	220	#if defined(PA_BASE) \|\| defined(__DOXYGEN__)
	221	#define IOPORT1 ((volatile msp430x_gpio_registers_t *)PA_BASE)
	222	#endif
	223
	224	/**
	225	* @brief GPIO port B identifier.
	226	*/
	227	#if defined(PB_BASE) \|\| defined(__DOXYGEN__)
	228	#define IOPORT2 ((volatile msp430x_gpio_registers_t *)PB_BASE)
	229	#endif
	230
	231	/**
	232	* @brief GPIO port C identifier.
	233	*/
	234	#if defined(PC_BASE) \|\| defined(__DOXYGEN__)
	235	#define IOPORT3 ((volatile msp430x_gpio_registers_t *)PC_BASE)
	236	#endif
	237
	238	/**
	239	* @brief GPIO port D identifier.
	240	*/
	241	#if defined(PD_BASE) \|\| defined(__DOXYGEN__)
	242	#define IOPORT4 ((volatile msp430x_gpio_registers_t *)PD_BASE)
	243	#endif
	244
	245	/**
	246	* @brief GPIO port E identifier.
	247	*/
	248	#if defined(PE_BASE) \|\| defined(__DOXYGEN__)
	249	#define IOPORT5 ((volatile msp430x_gpio_registers_t *)PE_BASE)
	250	#endif
	251
	252	/**
	253	* @brief GPIO port F identifier.
	254	*/
	255	#if defined(PF_BASE) \|\| defined(__DOXYGEN__)
	256	#define IOPORT6 ((volatile msp430x_gpio_registers_t *)PF_BASE
	257	#endif
	258
	259	/**
	260	* @brief GPIO port J identifier.
	261	*/
	262	#define IOPORT0 ((volatile msp430x_gpio_registers_t *)PJ_BASE)
	263
	264	/===========================================================================/
	265	/* Implementation, some of the following macros could be implemented as */
	266	/* functions, if so please put them in pal_lld.c. */
	267	/===========================================================================/
	268
	269	/**
	270	* @brief Low level PAL subsystem initialization.
	271	*
	272	* @param[in] config architecture-dependent ports configuration
	273	*
	274	* @notapi
	275	*/
	276	#define pal_lld_init(config) _pal_lld_init(config)
	277
	278	/**
	279	* @brief Reads the physical I/O port states.
	280	*
	281	* @param[in] port port identifier
	282	* @return The port bits.
	283	*
	284	* @notapi
	285	*/
	286	#define pal_lld_readport(port) ((port)->in)
	287
	288	/**
	289	* @brief Reads the output latch.
	290	* @details The purpose of this function is to read back the latched output
	291	* value.
	292	*
	293	* @param[in] port port identifier
	294	* @return The latched logical states.
	295	*
	296	* @notapi
	297	*/
	298	#define pal_lld_readlatch(port) ((port)->out)
	299
	300	/**
	301	* @brief Writes a bits mask on a I/O port.
	302	*
	303	* @param[in] port port identifier
	304	* @param[in] bits bits to be written on the specified port
	305	*
	306	* @notapi
	307	*/
	308	#define pal_lld_writeport(port, bits) ((port)->out = (bits))
	309
	310	/**
	311	* @brief Sets a bits mask on a I/O port.
	312	*
	313	* @param[in] port port identifier
	314	* @param[in] bits bits to be ORed on the specified port
	315	*
	316	* @notapi
	317	*/
	318	#define pal_lld_setport(port, bits) ((port)->out \|= (bits))
	319
	320	/**
	321	* @brief Clears a bits mask on a I/O port.
	322	*
	323	* @param[in] port port identifier
	324	* @param[in] bits bits to be cleared on the specified port
	325	*
	326	* @notapi
	327	*/
	328	#define pal_lld_clearport(port, bits) ((port)->out &= ~(bits))
	329
	330	/**
	331	* @brief Toggles a bits mask on a I/O port.
	332	*
	333	* @param[in] port port identifier
	334	* @param[in] bits bits to be XORed on the specified port
	335	*
	336	* @notapi
	337	*/
	338	#define pal_lld_toggleport(port, bits) ((port)->out ^= (bits))
	339
	340	/**
	341	* @brief Pads group mode setup.
	342	* @details This function programs a pads group belonging to the same port
	343	* with the specified mode.
	344	* @note Programming an unknown or unsupported mode is silently ignored.
	345	*
	346	* @param[in] port port identifier
	347	* @param[in] mask group mask
	348	* @param[in] offset group bit offset within the port
	349	* @param[in] mode group mode
	350	*
	351	* @notapi
	352	*/
	353	#define pal_lld_setgroupmode(port, mask, offset, mode) \
	354	_pal_lld_setgroupmode(port, mask << offset, mode)
	355
	356	/**
	357	* @brief Clears a pad logical state to @p PAL_LOW.
	358	* @details This function is implemented in a way which should
	359	* produce a BIC instruction rather than an AND
	360	*
	361	* @param[in] port port identifier
	362	* @param[in] pad pad number within the port
	363	*
	364	* @notapi
	365	*/
	366	#define pal_lld_clearpad(port, pad) ((port)->out &= ~(1 << pad))
	367
	368	#if !defined(__DOXYGEN__)
	369	extern const PALConfig pal_default_config;
	370	#endif
	371
	372	#ifdef __cplusplus
	373	extern "C" {
	374	#endif
	375	void _pal_lld_init(const PALConfig * config);
	376	void _pal_lld_setgroupmode(ioportid_t port, ioportmask_t mask, iomode_t mode);
	377	#ifdef __cplusplus
	378	}
	379	#endif
	380
	381	#endif /* HAL_USE_PAL == TRUE */
	382
	383	#endif /* _PAL_LLD_H_ */
	384
	385	/** @} */